Quartus - Signal Tap

FPGA 내부 신호를 읽어서 디버깅에 도움을 주는 Signal Tap 사용 방법

Compile

Pin Planning

Compile

Tools - Signal Tap

Signal Tap

Double Click - Node Finder - List - Add Nodes

After Insert

Basic AND	all Signals triggered = Capture
Basic OR	one of the Signals triggered = Capture
Comparision	Compares value with conditions
Advanced	Creates complex trigger

Select Clock

Save (.stp)

Assignments - Settings - Signal Tap - Enable - File Check

Compile

Programmer - Start

Open Signal Tap - Select JTAG Hardware

Run & Autorun - Check wave output